Semiconductor wafer manufacturing method

ABSTRACT

An edge-rounded portion mirror finishing process, which results in low deformation on a wafer, which has undergone a slicing process including a grinding process in which double-sided grinding is performed on the. sliced wafer; a finishing grinding process in which high-precision and low-deformation finish grinding is performed on the wafer; an edge rounding process in which low-deformation grinding is performed on an edge-rounded portion of the wafer; a two-sided primary polishing process in which primary polishing is performed on both sides of the edge-rounded wafer; a one-sided finish polishing process in which finish polishing is performed on one side of the wafer that has been primary polished on both sides; and a process in which finish polishing is performed on the edge-rounded portion of the above-mentioned wafer.

FIELD OF INVENTION

The present invention relates to a manufacturing method, which producesa semiconductor wafer of high flatness, and low process deformation froma single crystal ingot. For example, this manufacturing method comprisesa process, wherein a wafer is sliced from a single crystal ingot, thensubjected to surface grinding and finish grinding on both sides at thesame time, undergoes low-deformation edge rounding using a fixedabrasive, polished on both sides simultaneously, and is subjected toedge-rounded polishing, after which it is finish polished again on oneside. That is, the present invention relates to a manufacturing method,which performs low deformation grinding and polishing of an edge-roundedportion between surface grinding and polishing, and produces ahigh-precision semiconductor wafer, with high flatness, and low processdeformation required by large-diameter quality wafers, making itpossible to enhance yields in the device process.

BACKGROUND OF THE INVENTION

In general, a semiconductor wafer manufacturing method comprises thefollowing processes.

1) A slicing process, which produces a thin, disc-shaped wafers byslicing a single-crystal ingot pulled by a single-crystal pullingapparatus;

2) An edge rounding process for preventing the wafer chipping andcracking;

3) A lapping process for planarizing a wafer that has undergone edgerounding;

4) An etching process, which removes a process deformed layer generatedon a wafer by the above-mentioned processing;

5) An edge-rounded portion polishing process, which finish polishes theedge-rounded portion;

6) A polishing process, which polishes the above-mentioned wafer oneither one side or both sides; and

7) A process, which finish polishes the above-mentioned wafer.

In the past, in the above-mentioned etching process, acid etching wasperformed. However, this acid etching made it difficult to maintain theflatness achieved via the lapping process, and because of the abundantwaste liquid in the treatment processes of both etching and lapping,there were numerous environmental issuesas well.

Accordingly, with an object of doing away with the lapping process andetching process, and eliminating such waste liquid treatment, there hasbeen proposed (Japanese Patent Laid-open No. 6-177096) a method forsurface grinding each side of a wafer following slicing.

Further, with an objective of reducing the manufacturing process time,reducing polishing costs (quantity), and enhancing wafer flatness, therehas been proposed (Japanese Patent Laid-open No. 8-316180) a method,which after slicing, subjects a wafer to edge rounding, two-sidedsurface grinding, and then uses chemical polishing to finish the wafer.And with the same objective, there has been proposed (Japanese PatentLaid-open No. 9-248740) a method, which after slicing, subjects a waferto two-sided surface grinding, performs etching as needed to removeresidual deformation, and then uses chemical polishing to finish bothsides of the wafer.

Furthermore, with an objective of simplifying the wafer manufacturingprocess, and enhancing wafer flatness, there has been proposed (JapanesePatent Laid-open No. 9-260314, Japanese Patent Laid-open No. 9-270396) amethod, which after slicing, subjects a wafer to edge rounding andone-sided surface grinding, performs etching as needed to removeresidual deformation, washes the wafer, and then uses chemical polishingto finish both sides of the wafer. Also there has been proposed(Japanese Patent Laid-open No. 9-260314) a method, which after slicing,subjects a wafer to edge rounding, one-sided surface grinding, lapping,then after performing dry etching, uses chemical polishing to finishboth sides of the wafer.

As described above, a variety of manufacturing methods have beenproposed with an objective of solving problems related to waste liquidtreatment for etchants and lapping agents, and for reducing processingtime and also polishing costs when manufacturing semiconductor wafers.

However, even with the above-mentioned proposals, in methods, in whichan end rounding process is performed after the slicing process, becausethe thickness of the sliced wafers varies, the bevel width varies overthe entire wafer perimeter, causing yields to drop in the fabricationprocess.

Further, in methods, in which a lapping process and two-sided surfacegrinding process are carried out following an edge rounding process,there is the danger that the edge-rounded portion of a wafer will bescratched by the inner wall of the carrier, and at the same time,because of the different thickness of the wafers being processed, awafer will collide with a carrier during grinding, causing theedge-rounded portion to be chipped and damaged, and causing the loss ofthe cross-sectional shape of the edge-rounded portion.

SUMMARY OF THE INVENTION

With the foregoing problems of wafer manufacturing methods in view, itis an objective of the present invention to attempt to increase theprecision of a wafer by incorporating a low-deformation grinding processinto the wafer manufacturing process. Further, an objective of thepresent invention is to provide a novel high-precision semiconductorwafer manufacturing method, which is capable of reducing total materialscosts, and especially, which enables the realization of the high degreeof flatness and low process deformation required by large-diameterwafers, and enhances yields in the device process.

The inventors undertook a variety of studies concerning grinding andpolishing processes, having as an objective the realization of a highdegree of flatness and low process deformation in a semiconductor wafer,and enhance yields in the device process. As a result, the inventorslearned that it is possible to achieve the above-mentioned objective ina semiconductor wafer manufacturing method. A wafer is sliced from asingle crystal ingot, mirror polished on a required side by performing asurface grinding process of various processes, followed by applying amirror finish process of various processes for making the edge-roundedportion of a wafer a mirror finish with low deformation. Then finallyfinish polished on a required main side of an edge-rounded wafer.

Further, the inventors learned that various processes can be applied.Such as, 2-stage processes to each of the above-mentioned surfacegrinding process, an edge-rounded portion mirror finish process, and aprocess for mirror finish polishing a required main surface, which areemployed in the process of the present invention. Furthermore, theinventors brought the present invention to completion based on theknowledge that it is possible to achieve the above-mentioned object moreefficiently by interposing an edge-rounded portion grinding andpolishing process between the surface grinding process and the processfor mirror finish polishing a required main surface.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a graph comparing wafer flatness in accordance with aconventional method and the method of the present invention.

FIG. 2 is a graph comparing wafer surface roughness in accordance with aconventional method and the method of the present invention.

DETAILED DESCRIPTION OF PRESENTLY PREFERRED EMBODIMENTS

The present invention is a semiconductor wafer manufacturing method, inwhich a wafer is sliced from a single crystal ingot, a required surfaceis finished to a mirror finish. However, this method is characterized inthat it introduces an edge-rounded portion mirror finishing process,which mirror finishes with low deformation to the edge-rounded portionof a wafer.

With the present invention, it is possible to utilize in theabove-mentioned surface grinding process either process: (a) comprisinga grinding process which performs double-ended grinding, and a finishgrinding process which finish grinds either one side or two sides of awafer with high precision and low deformation, or; (b) comprising afinish grinding process which finish grinds both sides of a wafer withhigh precision and low deformation, and then an alkaline washingprocess.

With the present invention, it is possible to utilize in theabovementioned edge-rounded portion mirror finishing process, or; (c)comprising an edge-rounding process (c-1) which performs grinding withlow deformation, and an edge-rounded portion polishing process (c-2)which performs finish polishing, or; (d) comprising a mirror finishpolishing of a single or plurality of stages.

Further, setting to 2˜3 μm the process deformed layer of the entiresurface of a wafer following the low-deformation finish grinding of asurface and edge-rounded portion, does not allow a process deformedlayer to remain behind following a finishing process of a subsequentprocess.

With the present invention, it is possible to utilize a process,comprising a two-sided primary polishing process (e), which performsprimary polishing of both sides of a wafer, and a one-sided finishpolishing process (f), which finish polishes one side of a wafer thathas been primary polished on both sides.

With the present invention, after the slicing process, it is possible toefficiently manufacture a semiconductor wafer of high flatness and highprecision by performing processes in the order of a grinding process(a), which performs double-ended grinding of both sides of a wafer, anedge rounding process (c-1), which performs low-deformation grinding ofthe edge-rounded portion of a wafer. Then a two-sided primary polishingprocess (e), which performs primary polishing on both side of a wafer,an edge-rounded portion polishing process (c-2), which finish polishesthe edge-rounded portion of a wafer. Thereafter a one-sided finishpolishing process (f), which finish polishes one side of a wafer.

With the present invention, simultaneously grinding or polishing aplurality of wafers, and making the thickness of all the wafers fallwithin a required range prior to carrying out edge rounding processing,makes it possible to improve processing precision by making the bevelwidth uniform, and to reduce the generation of particles in the deviceprocess, thus enabling improved yields.

With the present invention, performing edge rounding after carrying outdouble-ended grinding and/or two-sided polishing, during which it ispossible for the wafer peripheral portion to come in contact either withother wafers or a carrier or other kind of apparatus, prevents damage tothe edge-rounded portion, making it possible to reduce particlegeneration in the device process, and enabling improved yields.

The slicing process either produces a thin disc-shaped wafer by slicinga single crystal ingot using the inner diameter of a cutting blade, orproduces a wafer using an apparatus called a wire saw by bringing amoving thin wire in contact with and slicing a single crystal ingotwhile applying a grinding slurry. To lessen the load on the grindingprocess, it is desirable that a wafer be sliced with extremely highflatness, and good surface roughness.

Because the thickness of the wafers vary when a wafer is planarized bylapping, bevel width variations are generated in the edge-roundingprocess, leading to decreased yields. Accordingly, double-ended grindingis performed with an objective of finishing with good thicknessprecision and flatness for a wafer produced by a slicing process. Thatis removing the waviness on a wafer produced by slicing, and removingthe process deformed layer produced by slicing.

With the present invention, double-ended grinding can make the depth ofthe process deformed layer of the surface of a wafer less than 10 μm. Itis also capable of removing the waviness on a wafer produced at slicing,by performing grinding on both sides of a wafer simultaneously with afixed abrasive without using a free abrasive. A grinding wheel with aparticle size of around #325˜#3000 can be utilized, and as the diamondbonding agent for making a fixed abrasive, a metal, vitrified, or resinbonding agent can be utilized as the abrasive bond.

The double-ended grinding process makes use of a vertical double-endedgrinding apparatus, which disposes between an upper grinding wheel and alower grinding wheel a carrier capable of holding one or a plurality ofwafers. The upper and lower grinding wheels are rotated at high speed byseparate and independent drive mechanisms, enabling double-endedgrinding to be performed on sliced wafers (not yet edge rounded), whichare held in a carrier that rotates at low speed. A single wafer-typeapparatus, which performs double-ended grinding on a single wafer thatis not held in a carrier, can also be used.

In the finish grinding process, since it is possible to make the depthof the process deformed layer of the surface of a wafer around 2˜3 μm,and it is also possible to make the total thickness variation (TTV) lessthan 1 μm by using a fine fixed abrasive. Therefore the etching process,which is effective at removing the process deformed layer, can beomitted. Thus enabling the prevention of wafer precision deteriorationresulting from etching. A grinding wheel with particle size of around#2000˜#8000 can be used, and a metal, vitrified, or resin bonding agentcan be utilized as the abrasive bond.

Further, because the finish grinding process enables the provision of ahigh precision wafer to the subsequent two-sided primary polishingprocess and the one-sided finish polishing process, production costs canbe greatly reduced. Also, the omitting the lapping process and theetching process also enables industrial wastes to be reduced.

For the finish grinding process, it is possible to utilize aconstitution, wherein single wafer grinding is performed in accordancewith a highly rigid vertical surface grinding apparatus. For example, astructure, in which there is disposed a rotating table, which is rotatedat high speed by a drive mechanism. Also grinding wheels can beutilized, which are rotated at high speed by a drive mechanism, they aredisposed above and below the above-mentioned table so as to be able tomove close to and away from. It is also possible to utilize aconstitution, wherein a ceramic plate is provided on a rotating table,and grinding is performed by vacuum clamping a wafer using a vacuumchuck.

The two-sided primary polishing process is performed for the purpose ofremoving the process deformed layer generated by the above-mentionedgrinding process; while maintaining the flatness of the wafer, which wasplanarized in the above-mentioned grinding process. Pressurizedpolishing is performed by supplying a polishing slurry, and using apolishing cloth comprising urethane foam. The particle size of thepolishing slurry is not especially limited, e.g., and a colloidalsilica, with a particle size of between 10˜270 nm can be utilized.

An example of an apparatus that can be used in the two-side primarypolishing process constitutes, for example, upper and lower plateshaving polishing pads and being disposed opposite one another. The lowerplate being equipped with a sun gear in the center, an internal gear onthe outer side, and a geared carrier being held between these gears. Inaccordance therewith, the carrier, holding a plurality of wafers andsandwiched between the polishing pads of the upper and lower plates, isautorotated and made to revolve. Hence, enabling the two-sided polishingof the wafers by the application of pressure from the upper plate.

Further, the one-sided finish polishing process can make use of aconstitution, wherein single-wafer polishing is performed using the sameconstitution as the above-mentioned highly rigid vertical polishingapparatus. For example, it is possible to use a constitution, wherein anupper plate having a polishing pad is rotated at high speed, and iscapable of applying pressure to the upper surface of a rotating table,which is also rotated at high speed. The rotating table is equipped witha ceramic plate, and polishing is performed by vacuum clamping a waferin a vacuum chuck. It is possible to use the same polishing pad andpolishing slurry as that utilized in the two-sided primary polishingprocess.

In the past, because heavy grinding was performed in the edge-roundingprocess, the grinding caused the process deformed layer to penetratedeep within a wafer, so that an edge-rounded portion polishing processalone could not remove the process deformed layer. Thus constituting theneed for an etching process. Accordingly, after performing either adouble-ended grinding process or a two-sided primary polishing process,in which processing can be carried out by either holding a wafer in acarrier or by holding a wafer by another method, it is possible tomanufacture wafers with uniform bevel widths. It is also possible toprevent the loss of the cross-sectional shape of the edge-roundedportion resulting from contact with a carrier or the like. This isachieved by finishing the edge of a wafer with high precision and lowdeformation, using a fine fixed abrasive in a low deformationedge-rounding process, which performs soft grinding that is gentle on anedge-rounded portion.

The low-deformation edge-rounding process can make use of aconstitution, which enables the vacuum clamping of a wafer by a vacuumchuck. Also at the peripheral portion of a rotating table, which isrotated at high speed, a grinding wheel for peripheral grinding and agrinding wheel for notch grinding, which are rotated at high speed,making it possible to perform soft grinding. A grinding wheel particlesize of around #325˜#6000 can be used, and a metal, vitrified, or resinbonding agent can be utilized as the abrasive bond.

As described above, by carrying out soft grinding in a low-deformationedge-rounding process, the diametric depth of the process deformed layercan be made 2˜3 μm. Therefore the roughness of the edge can be finishedfavorably, and an extremely smooth edge can be achieved using asubsequent edge finish polishing process alone.

The edge finish polishing process, in a constitution that is the same asthe above-mentioned edge polishing apparatus, for example, can make useof a constitution; which disposes at the peripheral portion of a lowspeed rotating table and a high speed polishing cloth-equipped buff.Thus making it possible to achieve a smooth edge.

In low-deformation edge rounding and edge-rounded portion polishing, itis possible to use a method in which polishing is carried out at aprescribed pressure while supplying a polishing slurry to a polishingcloth-equipped buff. A colloidal silica with a particle size of between20˜300 nm, for example, can be utilized as the polishing slurry.

EXAMPLE 1

A wafer manufacturing method according to the present invention wasimplemented using the following conditions. That is, in the slicingprocess (A), a single-crystal silicon ingot pulled using asingle-crystal pulling apparatus was sliced in a certain fixeddirection, and finished to a thin disc-shaped wafer.

Next, for the purpose of satisfactorily finishing a wafer to a precisethickness and flatness, removing the slicing-induced waviness from awafer surface, and removing the process-deformed layer generated duringslicing, double-ended grinding is performed using a double-endedgrinding process (B), which grinds up to 50 μm from both sides of awafer. The method used was one, in which diamond cup-type wheels wereutilized in the upper and lower grinding wheels. Furthermore, grindingwas carried out at a prescribed cutting speed while supplying a grindingagent to the upper and lower grinding wheels.

A low-deformation edge-rounding process (C) was performed on a waferthat had undergone this double-ended grinding. As for the conditions oflow-deformation edge rounding, horizontal grinding wheels were utilizedin the peripheral grinding wheel, and the notch grinding wheel.Furthermore grinding was carried out at a prescribed cutting speed whilesupplying a grinding agent to the peripheral grinding wheel and thenotch grinding wheel. It was ascertained that an abrasive of between#325˜#6000 can be utilized.

A wafer subjected to this double-ended grinding and low-deformation edgerounding was further planarized via a finish grinding process (D). Asfor the finish grinding conditions, a diamond cup wheel with a particlesize #2000˜#8000 was utilized. Grinding was performed at a prescribedcutting speed while supplying a grinding agent.

The above-mentioned wafer, which was planarized by finish grinding, wassubjected to a subsequent two-sided primary polishing process (E). Thisremoved the process-deformed layer of the surface of a wafer whilemaintaining flatness. As for the conditions of two-sided primarypolishing, a polishing cloth comprising an urethane foam was mounted tothe upper and lower plates, and polishing was performed under aprescribed pressure while supplying a polishing slurry having acolloidal silica particle size of between 10˜270 nm to the upper andlower plates.

In the low-deformation edge-rounding process (F), after carrying outeither a double-ended grinding process (B) or a two-sided primarypolishing process (E), in which a wafer was held in a carrier, the edgeof a wafer was finished with high precision and low deformation using afine fixed abrasive. Subsequent thereto, an edge-rounded portionpolishing process (G) was performed.

In low-deformation edge rounding and edge-rounded portion polishing,there was used a method, which utilized a #325˜#6000 diamond abrasivehorizontal grinding wheel in the peripheral grinding wheel and notchgrinding wheel, and which carried out grinding at a prescribed cuttingspeed while supply a grinding agent thereto.

Following this edge-rounded portion polishing process (G), afterundergoing a one-sided finish polishing process (H), a wafer withextremely high flatness was manufactured. One-sided finish polishingutilized a method, in which a polishing cloth comprising a urethane foamand a nonwoven fabric was mounted to a plate. Then polishing wasperformed under a prescribed pressure while supplying to the plate apolishing slurry based on a colloidal silica with a 10˜270 nm particlesize.

Comparison 1

The first example comprises (A) a slicing process, (B) a double-endedgrinding process, (C) a low-deformation edge-rounding process, (D) afinish grinding process, (E) a two-sided primary polishing process, (F)a low-deformation edge-rounding process, (G) an edge-rounded portionpolishing process, and (H) a one-sided finish polishing process. Forcomparison purposes, a wafer was manufactured having as a conventionalprocess 1) a slicing process, 2) an edge-rounding process, 3) a lappingprocess, 4) an etching process, 5) an edge-rounded portion polishingprocess, 6) a one-side polishing process, and 7) a finish polishingprocess.

For those processes that were the same in both the first example and theconventional process, the same processing conditions were applied.Furthermore, the lapping process utilized a method in which a wafer wasloaded into a carrier and sandwiched between an upper and a lower plate.Then processing was performed under a fixed pressure while supplying afree-abrasive slurry. The etching process utilized a method in which awafer was immersed in an acidic solution, such as hydrofluoric acid,nitric acid, or acetic acid, to remove a damaged layer resulting fromthe lapping process.

The flatness and surface roughness of the resulting wafers weremeasured, and the results thereof are shown in FIG. 1 and FIG. 2.Whereas flatness achieved with the conventional method was a TTV average(AVE) of 0.69 μm, and a local thickness variation (LTV) AVE of 0.29 μm,that achieved with the method of the present invention was a TTV AVE of0.48 μm, and an LTV AVE of 0.21 μm. Further, compared to a surfaceroughness achieved with the conventional method of Ra MAX 0.79 μm, RaMIN 0.54 μm, and Ra AVE 0.69 μm, that achieved with the method of thepresent invention was Ra MAX 0.58 μm, Ra MIN 0.32 μm, and Ra AVE 0.46μm.

EXAMPLE 2

A wafer was manufactured using a process, which omitted the (F)low-deformation edge-rounding process in the first example, but kept allthe other conditions the same. This second example confirmed that it ispossible to achieve a wafer having the same levels of flatness andsurface roughness as those of the first example.

EXAMPLE 3

A wafer was manufactured using a process, which reversed the order ofthe (C) low-deformation edge-rounding process and (D) finish grindingprocess in the second example to (D), (C), but kept all the otherconditions the same as those in the first example. This third exampleconfirmed that it is possible to achieve a wafer having the same levelsof flatness and surface roughness as those of the second example.

EXAMPLE 4

A wafer was manufactured using a process, which omitted the (D) finishgrinding process and the (F) low-deformation edge-rounding process inthe first example, but kept all the other conditions the same. Thisfourth example confirmed that it is not possible to achieve the samelevels of flatness and surface roughness as those of the first example,but is possible to achieve a wafer of higher precision than that of theconventional first comparative example.

What is claimed is:
 1. A semiconductor wafer manufacturing method, inwhich a wafer is sliced from a single crystal ingot and a predeterminedsurface is finished to a mirror finish, comprising: a grinding processwhich grinds simultaneously both sides of the wafer; an edge-roundingprocess which grinds a rounded edge portion of the wafer with lowdeformation; a two-sided primary polishing process which performsprimary polishing of said both sides of the wafer; a rounded edgeportion polishing process which performs finishing polishing of therounded edge portion of the wafer, and a one-sided finish polishingprocess which performs finish polishing on one side of the wafer.
 2. Thesemiconductor wafer manufacturing method according to claim 1, furthercomprising a finish grinding process, which performs finish grindingwith high precision and low deformation on ether one side or two sidesof the wafer, between the grinding process and the two-sided primarypolishing process.
 3. The semiconductor wafer manufacturing methodaccording to claim 1, wherein the edge rounding process follows thetwo-sided primary polishing process.
 4. The semiconductor wafermanufacturing method according to claim 2, wherein following said finishgrinding of the rounded edge portion and one side of the wafer, adeformed layer of the entire surface of the wafer is 2˜3 μm.
 5. Thesemiconductor wafer manufacturing method according to claim 1, whereinthickness of the wafer is provided within a predetermined range.